Design Verification Engineer

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Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal power management integrated circuits for satellite and other space applications prior to pattern generation/mask development. The role will require working independently from the product development team who designed the devices to confirm adherence to known design rules, procedures, and best practices. You may also run software simulations, selecting components and equipment based on analysis of specifications and reliability. Requires a BS degree or equivalent experience in the design of equipment, components or circuitry.

Minimum requirements

• Bachelor’s degree in electrical engineering or a related field
• Minimum of 5 years of experience

Preferred qualifications:

• Expertise in SystemVerilog, Verilog-AMS, and Cadence simulation tools
• Experience with modeling in Verilog-AMS and/or SystemVerilog real-number-models
• Knowledge of UVM and formal verification concepts
• Ability to establish strong relationships with key stakeholders critical to success, both internally and externally
• Ability to establish strong relationships with key stakeholders critical to success, both internally and externally
• Strong verbal and written communication skills
• Ability to quickly ramp on new systems and processes
• Demonstrated strong interpersonal, analytical and problem-solving skills
• Ability to work in teams and collaborate effectively with people in different functions
• Ability to take the initiative and drive for results
• Strong time management skills that enable on-time project delivery